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LEGAL PROTECTION OF SEMICONDUCTOR INTEGRATED CIRCUIT LAYOUT DESIGN IN INDIA: A PATHWAY TO INNOVATION

  • sonalimukhia2002
  • Jul 12
  • 9 min read

Author: Abhirath Narasimhan, RV University



INTRODUCTION

The demonstration of the first semiconductor microchip in 1958 hallmarked the transition from inefficient vacuum tube-based computing to the era of rapid computing using as little energy as possible. The chips are often made of pure silicon and have millions or billions of transistors and resistors etched onto them along with microscoping wiring. The positioning of the components on or within the silicon ‘wafer’ has a significant impact on how efficiently the chip functions. If the components violate distance thresholds (how close they can be to each other whilst still being operable) then they can malfunction and chip yield per silicon wafer would be problematically low. It is critical to cut crores of rupees in costs for chips to be cheaper and yet requires technological advancement to achieve an efficient chip in the smallest possible area on the wafer. This is why legal protection of chip layout design became indispensable and urgent. The layout design is an operative aspect rather than aesthetic one. Copyright law which protects expression of an idea was not suitable for technicality and functionality of layout design. The Designs Act was also not suitable as it protected aesthetics and not operational aspects. Each of the hundreds of components in a chip is patentable and it would thus be impracticable to use patent law to protect chip design. In 1984, the United States of America was the first country to have a sui generis piece of legislation to protect Semiconductor Integrated Circuit (SIC) layout design and punish chip piracy. India, being a member of the World Trade Organization (WTO) is also party to the Agreement on Trade-Related Aspects of Intellectual Property Rights (TRIPS), introduced the Semiconductor Integrated Circuits Layout Design Act, 2000 (SICLD) to bring the protection framework in Articles 35-38 of TRIPS into force in India.


ANALYSIS

TRIPS Framework for SIC Layout Design

Article 35 of TRIPS requires parties to protect ‘topographies’ of chips and adhere broadly to the Treaty on Intellectual Property in Respect of Integrated Circuits (IPIC). The licensing requirement under TRIPS’s patent provisions is extended to SIC layout design. Article 38 stipulates the time period of IP protection to be of 10 years. Article 36 seeks for states to implicate violators in certain cases of unauthorized usage which includes commercial distribution, sale and import. It extends not only to the layout design but the chip containing it or an article containing the chip in question. Article 37 contains exemptions such as if the act is done unknowingly. There are also exemptions relating to involuntary (forced) licensing in conditions such as when a reasonable amount of compensation is provided. IPIC was not primarily relied upon in TRIPS as that agreement did not come into force due to the displeasure of major countries with its protections. India’s SICLD, 2000 closely mirrors the TRIPS framework. Indian Courts have recognized the lack of protection of SIC layout design before 2000 (Puneet Industrial Controls vs M/S Classic Electronics & Anr, 2012).


SICLD Act, 2000 (SICLDA)

The Act was introduced to fulfill India’s international responsibilities under the TRIPS Agreement to protect layout design in SIC. The Act was also much needed to address the lack of specific protection for such functional SIC design aspects. Chip piracy results in reverse engineering of chips which are then sold at much lower prices, adversely affecting innovation in an age where it is sacrosanct.

‘Semiconductor Integrated Circuit’ is defined by the Act with three criteria. Firstly, it is a product having circuitry/circuitry elements. Secondly, these elements ought to be non-separable from the semiconductor material/insulating material which includes being made of semiconductor material itself. Thirdly, it has to be designed for the purpose of performing electronic circuitry function. ‘Layout Design’ has two criteria; Firstly, it is a layout of transistors or other elements of circuitry including the wires of lead that connect the elements to each other. Secondly, the expression of such layout may be in any way but must be in the form of a semiconductor integrated circuit. The interplay between these definitions show that it is a highly specific, technical statute meant exclusively for SIC layout design.

Section 5 provides for the office and seal of SIC Layout-Design Registry. Section 6 provides for a register wherein the SIC layout design will be entered along with particulars of the proprietor. Section 7 is critical as it states what will not qualify for registration. A layout design which is not original, which has been commercially exploited (In India or a convention country for more than 2 years), which is not inherently distinctive or not capable of being differentiated from another layout design would not be granted registration under the Act. If the combination of circuit components is commonly known but taken in its entirety as a product of ‘creator’s intellectual effort’, it would be considered original. Registration is for a period of ‘only’ 10 years from date of application or commercial exploitation whichever is chronologically prior. Section 17 provides for remedy in case of infringement and grants exclusive right of use when successfully registered. Section 24 also provides for a registered user, which is a person(s) who has right to use the layout design with the consent of the registered proprietor. Section 56 provides for stringent fines (cannot be less than fifty thousand INR but may extend to ten lakh INR) and imprisonment for up to three years or both for infringement. (Section 18). Section 18 has exemptions for ‘limited purposes of scientific evaluation, analysis, research or teaching.’ where ‘reproduction’ would not be considered infringement.

The Act under Section 32 provides for a ‘Layout-Design Appellate Board’ for deciding appeals against rejection of registration (Section 42), determination of royalty (Section 40), cancellation of registration (Section 41) and such other matters assigned by or under the Act.


CRITICAL EVALUATION

Originality under SICLD Act, 2000 recognizes that SIC layouts may have changes that appear minor to an amateur, but an expert would consider it functionally significant enough that it differs from the original registered layout. Therefore, there is a lower standard compared to patentability. Furthermore, the Act promotes progressive research by excluding layout design created through scientific evaluation/research on an older registered layout design from being labelled an infringement. The newer layout design may be registered differently and no right to use it will automatically accrue to the proprietor of the original layout design. However, this does not imply that the newly created SICLD will be exempted from Section 7. It still has to meet the criteria of originality and such others in Section 7.

What is noteworthy is that despite being well over two decades old, there is an unusual dearth of litigation surrounding the SICLD Act. As of March 31st, 2025, thirty-one applications for registration were received, fifteen were examined out of which seven applications were accepted, and certificates of registration were granted. For a country like India relying heavily on semiconductor technology and focusing on indigenous development, this number is alarmingly low. It has been theorized that the literal absence of case law relating to the Act and underutilization of it stem from the fact that companies are unaware of the Act’s benefits or existence.

A question arises that if SICLDA is a ‘ghost’ legislation and the other Intellectual Property Rights are not sufficient to protect layout design, what are companies doing to protect the chip design? One answer is aggressive non-disclosure clauses in multi-million-dollar contracts. But a better answer is that while Copyright law cannot protect the layout design for it is too technical and functional, the code that is written which precedes printing of the chip can be treated as ‘literary work’ under copyright law. Source code is clearly and explicitly defined in the Copyright Act, 1957 as a literary work. But since there is a technological difference between the source code and the chip itself, this offers only partial protection. What is more problematic about SICLD is the evidentiary standard needed to prove an infringement. An electron microscope would be required to match the chips concerned and see if there is a violation. Patent Law offers a good alternative although it specifically excludes the ‘topography’ of the SIC. Instead of litigating using the design aspect, it is more helpful to litigate that the competitor/alleged infringer stole the functional aspect/novel method/circuit component that has been patented. But as stated earlier, patent law is not suited for layout design protection due to impracticability and explicit exclusion.

But looking at the issue plainly, the lack of protection is not affecting the industry in India as much simply because there is a tight manufacturing scarcity in the country. It is very cumbersome for anyone to produce a chip in itself, let alone steal a layout design and duplicate the chip. But this is not to say that chip piracy does not happen or is not happening in India. The issue has been swept under the carpet, and an unpleasant silence surrounds it.

The United States of America has a lone landmark judicial pronouncement that works as a foundation in the future of SIC layout design jurisprudence. In Brooktree Corporation v. Advanced Micro Devices Inc. (U.S Federal Court, 1993), the appellate court affirmed the District Court’s decision that there was no infringement. While doing so, the court acknowledged that ‘reverse engineering’ is a valid defense even though the defendant failed to satisfy the jury that the chip was reverse engineered. The Federal Court was of the opinion that a copied chip need not be an exact copy of the protected one, a ‘substantial similarity’ was considered to suffice to prove an infringement. The appellant was awarded damages for the infringement of their chip layout. The ‘reverse engineered’ logic already exists in India’s SICLD Act but the doctrine of substantial similarity finds no space in the Act’s plain wording. Should Indian Courts choose to read this into the statute, it would still be a challenge to balance/draw the boundary between reverse engineering and substantial similarity. Needless to say, each case would likely have to go with its own facts and circumstances.


CONCLUSION

While the legal framework to protect SIC layout designs exists in India in the form of a well-drafted law, it is largely untested due to India’s underdeveloped semiconductor manufacturing industry, lack of knowledge of the law and major reliance on Patent law. India is on a path of rapid industrial development with inflow of billions in the form of investment from developed and developing countries. With an evolving R&D arena, this law will indeed be put to use soon. For this, the Government must increase dialogue with stakeholders and review the legislation to pinpoint the main reason for lack of registration applications under it. India can make use of jurisprudence from common law jurisdictions like the USA who are ahead in SICLD protection and mold it to suit Indian conditions. It can, however, be said for certain that Government-Corporate cooperation is indispensable in determining the future of SICLD protection legal framework in India and that since law responds to society’s pressures, this legal arena would become a massive topic with semiconductor manufacturing economic boom in the country.


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